(a) Field of the Invention
The present invention relates to a method of fabricating a semiconductor device, and more particularly to a method of forming a gate electrode in a semiconductor device, which is capable of reducing a line width of the gate electrode.
(b) Description of the Related Art
With the development of manufacturing techniques for semiconductor devices and the expansion of their applications, research and development into increased integration of semiconductor devices has progressed rapidly. Also, with the increased integration of semiconductor devices, studies for downsizing semiconductors based on microscopic process technologies have progressed.
With the downsizing of semiconductor devices, an adjustment of gate CD (critical dimension), which can be referred to as the width of gate, is very important. This is because a transistor driving current varies greatly depending on a variation of the gate CD.
Conventionally, in implementing a gate electrode, by defining a region on which a gate electrode is located on a photoresist once when a photolithography process is performed, a line width of the gate electrode is limited by a light source used in the photolithography process.
Techniques related to the method of forming the gate electrode are disclosed in U.S. Pat. Nos. 6,420,097, 6,165,881, 6,107,175, and 5,965,461.
Hereinafter, a conventional general method of forming a gate electrode will be described with reference to FIGS. 1A and 1B.
A gate oxide 2 is formed on a silicon substrate 1, a polysilicon 3 to function as a gate electrode later is deposited on the gate oxide 2, and then a photoresist 4 is patterned by using a photolithography process in order to define the gate electrode.
At this time, the photolithography process is progressed such that a pattern of photoresist 4 exists on only a region on which the gate electrode is to be formed (i.e. gate electrode 10 not yet patterned as depicted in FIG. 1). Also, a line width of the pattern of photoresist 4 is limited by a wavelength of a light source used when the photolithography process is progressed. A wavelength band includes multiple wavelengths of differing lengths, and the line width of the pattern can be more reduced as the wavelength becomes shorter. Conventionally, the wavelength of 248 nm or 193 nm was used, limiting the line width of the pattern to about 0.13 μm.
Based on the pattern of the photoresist as formed above, the polysilicon 3 is etched so that a desired gate electrode 3a is formed.
However, since the line width of the gate electrode, which is the most narrow line width of all line widths of elements in the semiconductor device, is destined to be limited by the wavelength of the light source used when the photolithography process is performed, an overall size of the semiconductor device is also limited.
Accordingly, an integration of the semiconductor device is faced with a limit.